Add Verilog files recursively in Altera Quartus II

This post describes how you add multiple Verilog files recursively to your project in Altera Quartus II. If you are using VHDL you can simply change the file matching from "*.v" to "*.vhd*".

Create a file named "addallv.tcl" in your project folder with the contents listed below. Change "myfolder" to the name of the sub-folder below your project folder that contains the files (or folders with files) you would like to add. Run it in the Tcl Console with:

source addallv.tcl

addall.tcl:

package require ::quartus::project
package require fileutil
#addallv.tcl by http://www.thalin.se

set folderName "myfolder"

foreach file [fileutil::findByPattern $folderName *.v] {
    puts $file
    set_global_assignment -name VERILOG_FILE $file
}

Hints

You have to enable the the Tcl Console by selecting View -> Utility Windows -> Tcl Console.

Run the command by typing it in front of tcl> and press return.

8051 on Altera Cyclone IV

The 8051 microcontroller (aka MCS-51 or 80C51) was develop by Intel in 1980. Still over 30 year later its architecture is widely used. In this post am using the lightweight 8051 compatible core ligth52 from Open Cores on the Altera Cyclone IV TB276 board from my previous posts. This implementation runs the core at 75 MHz. It has some precompiled examples. To develop your own code you need the free SDCC C-compiler.You will also need python. I use python xy.

Download the design adopted to TB276 here.

Resource usage:
Logic elements: 1,239 / 6,272 ( 20 % )
Memory bits: 20,480 / 276,480 ( 7 % )
Embedded Multiplier 9-bit elements: 1 / 30 ( 3 % )
Total PLLs: 1 / 2 ( 50 % )

To get the serial port output I used an FTID cable (3.3 Volt version) with the following connections:
Black to GND
Oragen to pin 7
Yellow to pin 10
Others are unconnected.

Press button Key2 on the board to reset the core and start the output on the serial port. I used RealTerm to capture the output. Settings are 19200,8,N,1

Example design for TB276 Altera Cyclone IV E FPGA board

This is an example design that defines the clock, led and button pins for the Canton-electronics TB276 board in one of my previous posts. It implements a small demo with the leds and buttons. Download the Verilog source code and project file from here: brd_test.qar. The .qar-file is an archive that can be extracted with Altera Quartus II.

How to build and download to the FPGA

1. Double click the .qar file to open it in Quartus II.

2. Press OK to extract the files and open the project.

3. Double click on Compile Design as illustrated below and wait for the compile to finish. It will take a few seconds.

Make sure that you have connected the power and the programming cable to the board. Make sure that the driver for the cable is installed. See my previous post for driver installation.

5. Hit the download button in the toolbar.

This will open the programmer window.

6. Press Hardware Setup to configure the programming cable.

7. Press Start to program the FPGA. Please note that this will program the FPGA directly and so the configuration is lost if power is cycled.

Here is a video of the result.

Low cost Altera FPGA board

After using Xilinx FPGAs for many years I decide that it was time to take a look at Altera. I googled for a suitable low cost development board that would work with the free version of the Altera tools. Most boards are quite expensive but there are less expensive alternatives. I found a promising board from a vendor in China called Canton-electronics for only ~$40 this also includes a JTAG cable. I couldn't  resist from buying it. Two weeks later it arrived. My first tests show that the board and the cable works fine. I will post more details when I have tested it more thoroughly.

Hardware

Board: TB276
Download cable: Altera USB Blaster
Bundle with board and cable ~$40 from Canton-electronics.

Board specs
FPGA: Altera Cyclone IV E 4EP4CE6E22C8N
Flash chip: EPCS4, 4Mbit
Onboard oscillator: 25MHz
10 LEDs
2 Buttons

FPGA specs
Device: Altera Cyclone IV E 4EP4CE6E22C8N
Number of logic elements: 6272 LE
Number of IO pins: 92
Embedded memory: 270 Kbits
Embedded Multiplier 9-bit: 30 instances (18-bit: 15 instances)
Embedded PLLs: 2 instances
Serial Transceivers: None

Software

Altera Quartus II Web Edition (free version) download from: www.altera.com

Installing cable drivers

The USB-Blaster driver needs to be manual installed in the device manager. You find them here after installing Quartus II: C:\altera\13.1\quartus\drivers\usb-blaster

Programming the flash
If you want the FPGA to start with your configuration you need to program the EPCS4 flash chip. Here is a guide how to do this: http://retroramblings.net/?p=622